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M3727GM6 Datasheet, PDF (63/129 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
M3727GM6/M8–XXXSP/FP M37272E8SP/FP
Block Control register i
b7 b6 b5 b4 b3 b2 b1 b0
Block control register i (BCi) (i=1, 2) [Addresses 00D2 16 and 00D316]
B
Name
0, 1 Display mode
selection bits
(BCi0, BCi1)
(See note 1)
Functions
b1 b0
0 0: Display OFF
0 1: CC mode
1 0: OSD mode (Border OFF)
1 1: OSD mode (Border ON)
After reset R W
Indeterminate R W
2, 3 Dot size selection
b4 b3 b2 Pre-divide Ratio Dot Size Indeterminate R W
bits (BCi2, BCi3)
4 Pre-divide ratio
selection bit (BCi4)
00
01
0 10
11
00
01
1 10
11
1Tc ✕ 1/2H
1Tc ✕ 1H
✕2
2Tc ✕ 2H
3Tc ✕ 3H
1Tc ✕ 1/2H Indeterminate R W
1Tc ✕ 1H
✕3
2Tc ✕ 2H
3Tc ✕ 3H
5 OUT1/OUT2 output control 0: OUT1 output control
bit (BCi5) (See note 1)
1: OUT2 output control
Indeterminate R W
6 Vertical display start
position control bit
(BCi6)
7 Window top/bottom
boundary control bit
(BCi7)
BC16: Block 1
BC26: Block 1
Indeterminate R W
BC17: Window top boundary
Indeterminate R W
BC27: Window bottom boundary
Notes 1: Bit RA3 of OSD RAM controls OUT1 output when bit 5 is “0.”
Bit RA3 of OSD RAM controls OUT2 output when bit 5 is “1.”
2: Tc is OSD clock cycle divided in pre-divide circuit.
3: H is HSYNC.
Fig. 8.11.4 Block Control Register i
Rev.1.00 Apr 01, 2001 page 63 of 127
REJ03B0132-0100Z