M3727GM6 Datasheet, PDF (11/129 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

M3727GM6/M8–XXXSP/FP M37272E8SP/FP
8. FUNCTIONAL DESCRIPTION
8.1 CENTRAL PROCESSING UNIT (CPU)
This microcomputer uses the standard 740 Family instruction set.
Refer to the table of 740 Family addressing modes and machine
instructions or the SERIES 740 <Software> User’s Manual for de-
tails on the instruction set.
Machine-resident 740 Family instructions are as follows:
The FST, SLW instruction cannot be used.
The MUL, DIV, WIT and STP instructions can be used.
8.1.1 CPU Mode Register
The CPU mode register contains the stack page selection bit and
internal system clock selection bit. The CPU mode register is allo-
cated at address 00FB16.
CPU Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
1 1 0 0 CPU mode register (CM) [Address 00FB16]
B
Name
0, 1 ^{Processor mode bits}
(CM0, CM1)
Functions
After reset R W
b1 b0
0 0: Single-chip mode
0 1:
1 0: Not available
1 1:
0 RW
2 ^{Stack page selection 0: 0 page}
bit (CM2) (See note) 1: 1 page
1 RW
3, 4 Fix these bits to “1.”
1 RW
5 XCOUT drivability
selection bit (CM5)
0: LOW drive
1: HIGH drive
6 Main Clock (XIN–XOUT) _{0: Oscillating}
stop bit
1: Stopped
(CM6)
1 RW
0 RW
7 Internal system clock _{0: XIN–XOUT selected}
0 RW
selection bit
(high-speed mode)
(CM7)
1: XCIN–XCOUT selected
(high-speed mode)
Note: This bit is set to “1” after the reset release.
Fig. 8.1.1 CPU Mode Register
Rev.1.00 Apr 01, 2001 page 11 of 127
REJ03B0132-0100Z