PDI1394L11 Datasheet, PDF (41/46 Pages) NXP Semiconductors – 1394 AV link layer controller

Philips Semiconductors
1394 AV link layer controller
Product specification
PDI1394L11
14.1 Pin Categories
Table 11. Pin Categories
Category 1:
Input/Output
Category 2:
Input
Category 3:
Input
Category 4:
Output
HIF D[7:0] HIF A[8:0]
RESET_N CYCLEOUT
AVSYNC
HIF CS_N
CYCLEIN AVERR0
AVVALID
HIF WR_N
AVCLK
AVERR1
AV D[7:0]
HIF RD_N
ISO_N
CLK25
AVFSYNCIN
AVFSYNCOUT
AVENDPCK
Category 5:
Output
HIF INT_N
Category 6:
Input/Output
PHY D[0:7]
PHY CTL[0:1]
Category 7: Category 8:
LREQ
SCLK
15.0 AC CHARACTERISTICS
GND = 0V, C_L = 50pF
SYMBOL
PARAMETER
TEST CONDITIONS
t_PERIOD
t_SU
t_IH
t_OD
t_WHIGH
t_WLOW
t_PWFSO
t_PWFSI
t_SUP
t_HP
t_SCLKPER
t_DP
t_AS
t_AH
t_CL
t_CH
t_RP
t_ACC
t_DH
t_DS
t_WRP
t_CWH
t_CWL
t_CP
t_CD
t_RESET
AV clock period
AV clock setup time
AV clock input hold time
AV clock output delay time
AV clock pulse width HIGH
AV clock pulse width LOW
AVFSYNCOUT pulse width HIGH
AVFSYNCIN pulse width HIGH
PHY-link setup time
PHY-link hold time
SCLK period
PHY-link output delay
Host address setup time
Host address hold time
Host chip select pulse width LOW
Host chip select pulse width HIGH
Host read pulse width
Host access time
Host data hold time
Host data setup time
Host write pulse width
CYCLEIN HIGH pulse width
CYCLEIN LOW pulse width
CYCLEIN cycle period
CYCLEOUT cycle delay
RESET_N pulse width LOW
Note: C_L = 20pF
WAVEFORMS
Figure 23
Figure 23
Figure 23
Figure 23
Figure 23
Figure 23
Figure 24
Figure 25
Figure 26
Figure 26
Figure 26
Figure 27
Figure 28
Figure 28
Figure 28
Figure 28
Figure 28
Figure 28
Figure 28
Figure 28
Figure 28
Figure 29
Figure 29
Figure 29
Figure 30
Figure 31
LIMITS
T_amb = 0°C to +70°C
MIN
TYP MAX
41.67
20
3
3
20
UNIT
ns
ns
ns
ns
100
140
ns
100
ns
6.0
ns
2.5
ns
20.347 20.345 20.343 ns
2.0
14.0
ns
0
ns
0
ns
115
ns
42
ns
115
ns
115
ns
0
ns
0
ns
115
ns
200
ns
200
ns
125
µs
20
ns
10
µs
1997 Oct 21
41