SAA8200HL Datasheet, PDF (21/71 Pages) NXP Semiconductors – Ensation Base integrated wireless audio baseband

Philips Semiconductors
SAA8200HL
Ensation Base integrated wireless audio baseband
Table 11: VPB0 bridge interface description …continued
Base address Offset Key
0x0C48 CNF_SRI _RST_N
0x0C4C CNF_RSC_RST_N
0x0C50 CNF_SRI_I2C_RST_N
0x0C54 CNF_AD10BIT_RST_N
0x0C58 CNF_FSL_RST_N
0x0C5C CNF_GCC_RST_N
0x0C60 CNF_AD10BIT_PRST_N
0x0C64 HP0_FIN_SELECT
0x0C68 HP0_MDEC
0x0C6C HP0_NDEC
0x0C70 HP0_PDEC
0x0C74 HP0_MODE
0x0C78 HP0_STATUS
0x0C7C HP0_ACK
0x0C80 HP0_REQ
0x0C84 HP0_INSELR
0x0C88 HP0_INSELI
0x0C8C HP0_INSELP
0x0C90 HP0_SELR
0x0C94 HP0_SELI
0x0C98 HP0_SELP
0x0C9C LP0_FIN_SELECT
0x0CA0 LP0_PWD
0x0CA4 LP0_BYPASS
0x0CA8 LP0_LOCK
0x0CAC LP0_DIRECT
0x0CB0 LP0_MSEL
0x0CB4 LP0_PSEL
0x 1000
0x0000 RX
0x0000 TX
0x0004 STS
0x0008 CTL
0x000C CLKHI
0x0010 CLKLO
0x0014 ADDR
0x0028 TXS
0x 2000
0x0000 ADC_R0
0x0004 ADC_R1
0x0008 ADC_R2
Description
reset for serial radio interface
reset for Reed-Solomon codec
reset for SRI I²C-bus
reset for control ADC
reset for frame sync lock
reset for gated channel clock
preset for control ADC
audio clock PLL input select
audio clock PLL M divider
audio clock PLL N divider
audio clock PLL P divider
audio clock PLL mode
audio clock PLL status
audio clock PLL acknowledge
audio clock PLL change request
audio clock PLL input bandwidth selection
audio clock PLL input bandwidth selection
audio clock PLL input bandwidth selection
audio clock PLL input bandwidth selection
audio clock PLL input bandwidth selection
audio clock PLL input bandwidth selection
system clock PLL input select
system clock PLL power-down
system clock PLL bypass
system clock PLL in-lock
system clock PLL direct CCO control
system clock PLL M divider
system clock PLL P divider
SRI I²C-bus
receive FIFO
transmit FIFO
status register
control register
clock divisor high
clock divisor low
I²C-bus address
slave transmit FIFO
control ADC
ADC data channel 0
ADC data channel 1
ADC data channel 2
SAA8200HL_2
Preliminary data sheet
Rev. 02 — 17 October 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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