SAA8200HL Datasheet, PDF (13/71 Pages) NXP Semiconductors – Ensation Base integrated wireless audio baseband

Philips Semiconductors
SAA8200HL
Ensation Base integrated wireless audio baseband
The outputs of the ADC, I²S-bus inputs, SPDIF inputs and VPB buses are mapped to the
inputs of the EPICS7B.
Table 8: DIO input registers
DIO input register Register name
0
I2SIN_1L
1
I2SIN_1R
2
I2SIN_2L
3
I2SIN_2R
4
SPDIF L
5
SPDIF R
6
ADC_L
7
ADC_R
8
VPB0_DI1
9
VPB0_DI2
10
VPB1_DI
11
TS_COUNTER
12
I2SIN_1TS
13
I2SIN_2TS
14
SPDIF_TS
15
ADC_TS
16
I2SOUT_TS
17
TS_COUNTER
Description
I²S-bus input 1 left channel
I²S-bus input 1 right channel
I²S-bus input 2 left channel
I²S-bus input 2 right channel
SPDIF input left channel
SPDIF input right channel
ADC input left channel
ADC input right channel
VPB0 data input 1 (bit 0 to bit 15)
VPB0 data input 2 (bit 16 to bit 31)
VPB1 data input (UART)
time stamp counter i2sin1
time stamp counter i2sin2
time stamp counter spdif
time stamp counter adc
time stamp counter i2sout
The control of the DAC, I²S-bus outputs and VPB buses are mapped to the outputs of the
EPICS7B.
Table 9: DIO output registers
DIO output register Register name
0
I2SOUT_1L
1
I2SOUT_1R
2
I2SOUT_2L
3
I2SOUT_2R
4
DAC_L
5
DAC_R
6
not connected
7
not connected
8
VPB0_DO1
9
VPB0_DO2
10
VPB0_ADDR
11
VPB1_DO
12
VPB1_ADDR
13
not connected
14
not connected
Description
I²S-bus output 1 left channel
I²S-bus output 1 right channel
I²S-bus output 2 left channel
I²S-bus output 2 right channel
DAC output left channel
DAC output right channel
VPB0 data output 1 (bit 0 to bit 15)
VPB0 data output 2 (bit 16 to bit 31)
VPB0 address
VPB1 data output (UART)
VPB1 address
SAA8200HL_2
Preliminary data sheet
Rev. 02 — 17 October 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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