SAA8200HL Datasheet, PDF (12/71 Pages) NXP Semiconductors – Ensation Base integrated wireless audio baseband

Philips Semiconductors
SAA8200HL
Ensation Base integrated wireless audio baseband
Table 6: Control registers description
Register name Address R/W Description
DSP
PC
0x0 FFFF W
program counter register
SR1
0x0 FFFE W
status register 1
SR2
0x0 FFFD W
status register 2
RTI_STACK
0x0 FFFC W
interrupt stack register
IO_DIR
0x0 FFFB W
configuration register 1
IO_MODE
0x0 FFFA W
configuration register 2
CR
0x3 FFFF W
control register I/O mapped
EIR
0x3 FFFE W
EPICS7B instruction register
Interrupt controller
INTC_POL
0x0 FFF9 W
polarity select
INTC_MODE
0x0 FFF8 W
mode select
INTC_MASK
0x0 FFF7 W
mask
INTC_STATUS 0x0 FFF6 R
status
INTC_TEST
0x0 FFF5 W
test
INTC_SWCLR 0x0 FFF4 W
software clear
INTC_SLCT
0x0 FFF3 W
user flag
DMA controller
DMAC_IC
0x0 FFF2 R
IRQ counter value
The interrupts and connection order are described in Table 7.
Reset
undefined
undefined
undefined
undefined
0x00 0000
0x00 0FFD
0x00 0000
0x00 0000
0x03 FFFF
0x03 FFFF
0x03 FFFF
undefined
0x00 0001
0x00 0000
0x00 0000
0x00 0000
Table 7: Interrupt flags
Interrupt flag Symbol
Description
0
FI_DMAC
DMAC interrupt
1
FI_SRI_DMA_RX_RDY SRI RX DMA block transfer interrupt
2
FI_FLSTART
FSL start interrupt
3
FI_EVENTROUTER event router interrupt
4
FI_SRI_DMA_TX_RDY SRI TX DMA block transfer interrupt
5
FI_I2SIN_1
I²S-bus input 1 interrupt
6
FI_I2SIN_2
I²S-bus input 2 interrupt
7
FI_SPDIF
SPDIF input interrupt
8
FI_ADC
ADC input interrupt
9
FI_DACALL
I²S-bus and DAC outputs interrupt
10
FI_RSC_ENCRDY
RSC encoder ready interrupt
11
FI_RSC_DECRDY
RSC decoder ready interrupt
12
FI_RSC_DMARDY
RSC DMA block transfer ready interrupt
13
FI_VPB0
VPB0 interrupt
14
FI_VBP1
VPB1 interrupt
15
FI_UART
UART interrupt
16
FI_I2C_DMARDY
I²C-bus M/S DMA block transfer interrupt
17
FI_FSLFAST
FSL fast interrupt
SAA8200HL_2
Preliminary data sheet
Rev. 02 — 17 October 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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