PNX1502E Datasheet, PDF (640/828 Pages) NXP Semiconductors – Connected Media Processor

NXP Semiconductors
Volume 1 of 1
PNX15xx/952x Series
Chapter 20: 2D Drawing Engine
The X and Y fields are unsigned 11 bit numbers allowing a 2K by 2K address space.
Since the drawing engine uses linear addresses internally, the X and Y coordinates in
this register will be converted to a linear address. It is byte accessible; a write to the
high byte of this register begins the conversion process from XY to linear. It is not
used for vectors.
Note that SrcLinear should be utilized when using monochrome bitmaps or text. The
lower six bits of SrcLinear specify the starting bit position within a DWORD. Also loads
the SrcLinear register with the converted XY address.
Table 22: Destination Address, XY Coordinates
Bit Symbol
Acces
s
Value
Description
Offset 0x04 F430
Destination Address, XY Coordinates
31:27 Reserved
26:24 Y[10:8]
R/W 0
Unsigned 11-bit Y destination address
23:16 Y[7:0]
R/W 0
15:11 Reserved
10:8 X[10:8]
R/W 0
Unsigned 11-bit X destination address
7:0 X[7:0]
R/W 0
This register is used to load the starting XY pixel destination coordinate for a drawing
operation.
The X and Y fields are unsigned 11-bit numbers allowing a 2K by 2K address space.
Since the drawing engine uses linear addresses internally, the X and Y coordinates in
this register will be converted to a linear address. It is byte accessible; a write to the
high byte of this register begins the conversion process from XY to linear.
This register causes the same behavior as writing to DstXY2, which is provided to
allow for command register bursting during vector commands.
Drawing commands that require patterns must use this register to specify the
destination coordinate. Using the DstLinear register to specify destination during a
pattern command will cause errant results.
Table 23: BLT Size
Bit Symbol
Offset 0x04 F434
31:28 Reserved
27:16 H
15:12 Reserved
11:0 W
Acces
s
BLT Size
Value
Description
R/W FFF
Height of the BLT in scanlines
R/W FFF
Width of the BLT in pixels
Also loads the DstLinear register with the converted XY address.This register
specifies the height and width of a BLT operation in pixels/scanlines.
PNX15XX_PNX952X_SER_N_4
Product data sheet
Rev. 4.0 — 03 December 2007
© NXP B.V. 2007. All rights reserved.
20-640