PNX1502E Datasheet, PDF (118/828 Pages) NXP Semiconductors – Connected Media Processor

NXP Semiconductors
Volume 1 of 1
PNX15xx/952x Series
Chapter 3: System On Chip Resources
• PCI configspace PERSONALITY entry. Each PNX15xx/952x Series receives a
16-bit PERSONALITY value from the EEPROM during boot. This
PERSONALITY register is located at offset 0x40 in configuration space. In a MP
system, some of the bits of PERSONALITY can be individualized for each CPU
involved, giving it a unique 2-, 3- or 4-bit ID, as needed given the maximum
number of CPUs in the design.
• In the case of a host-assisted PNX15xx/952x Series boot, the PCI BIOS assigns
a unique MMIO_BASE and DRAM_BASE to every PNX15xx/952x Series. In
particular, the 11 MSBs of each MMIO_BASE are unique, since each MMIO
aperture is 2 Megabytes in size. These bits can be used as a personality ID. Set
bit 11 (MSB) to '1' to guarantee a non-zero ID value.
5.3 The Master Semaphore
Each PNX15xx/952x Series in the system adds a block of 16 semaphores to the mix.
The intended use is to treat one of these block of 16 semaphores as THE master
semaphore block in the system. To determine which semaphore block is master each
TM3260 can use PCI configuration space accesses to determine which other
PNX15xx/952x Seriess are present in the board system. Then, the PNX15xx/952x
Series with the lowest PERSONALITY number, or the lowest MMIO_BASE is chosen
as the PNX15xx/952x Series containing the master semaphores.
5.4 Usage Notes
To avoid contention between the different tasks trying to access the different critical
resources of the system or the application, PNX15xx/952x Series offers 16 different
semaphore devices. This allows to use them not only for inter-processor semaphores
but also for processes running on a single PNX15xx/952x Series. However these
process synchronizations within the same processor can use regular memory to
memory transactions to implement primitive synchronization.
As described here, obtaining a semaphore does not guarantee starvation-free access
to critical resources. Claiming of one of the semaphores is purely stochastic. This
works fine as long as a particular semaphore is not overloaded. Despite a large
amount of available semaphores, utmost care should be taken in semaphore access
frequency and duration of the basic critical sections to keep the load conditions
reasonable.
PNX15XX_PNX952X_SER_N_4
Product data sheet
Rev. 4.0 — 03 December 2007
© NXP B.V. 2007. All rights reserved.
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