PNX1502E Datasheet, PDF (387/828 Pages) NXP Semiconductors – Connected Media Processor

NXP Semiconductors
Volume 1 of 1
PNX15xx/952x Series
Chapter 11: QVCP
Horizontal Total
Horizontal Blank End
Horizontal Sync End
Horizontal Sync Start
Horizontal Blank Start
Active Display Area
Figure 14: Video Frame Screen Timing
3.4 Programming the STG
Because the STG coordinate system begins at (0,0), it’s necessary to program
certain registers to one less than the desired value. For example, a scan line has 800
pixels total. The horizontal total should be set to 799 because 0—799 is a total of 800.
The same applies to programming the vertical total.
In the vertical domain, there are three main timing intervals to set: vertical active time,
vertical blank time, and vertical sync time. The position of the vertical sync defines
the vertical front and back porches. Note that the vertical sync interval (and therefore
vertical blanking) must be a minimum of one line in duration.
The STG has no specific requirement for horizontal blank and sync. The location,
duration and even existence of horizontal blank and sync times is entirely display
surface dependent. If the display surface does not require horizontal blanking, it’s not
necessary to program it into the STG.
Non-blanked area occurs when the currently active line is not within the vertical
blanking interval or in the column of the horizontal blanking interval. Display layers
can be programmed to reside on any portion of the screen. Any non-blanked screen
position that does not have an active display layer pixel assigned to it will result in the
background color or the previous layer pixel being displayed.
PNX15XX_PNX952X_SER_N_4
Product data sheet
Rev. 4.0 — 03 December 2007
© NXP B.V. 2007. All rights reserved.
11-387