PNX1502E Datasheet, PDF (352/828 Pages) NXP Semiconductors – Connected Media Processor

NXP Semiconductors
Volume 1 of 1
PNX15xx/952x Series
Chapter 10: LCD Controller
Table 2: LCD CONTROLLER Registers …Continued
Bit Symbol
Acces
s
Value
Description
0
PUD_STATUS
R
1
This is a read only bit that gives the status of power up or down
sequence, If this bit is set to ‘1’ and START_PUD_SEQ bit is ‘1’,
then the power up sequence has been completed. If this bit is set to
‘1’ and START_PUD_SEQ bit is ‘0’, then the power down sequence
has been completed. If this bit is ‘0’, then either a power up or down
(depending on START_PUD_SEQ bit) sequence is in progress.
Offset 0x07,300C—0x07,3FF0
Reserved
Offset 0x07,3FF4
31:1 Unused
0
DISABLE_IF
LCD_DISABLE_IF
-
R/W 0
Offset 0x07,3FF8
Reserved
Setting this bit to ‘1’ disables the MMIO interface. The only valid
transactions are to the interface disable register. All other
transactions are not valid, write transactions will generate a write
error and read transactions will return 0xDEADABBA.
The bit is used to provide power control status for system software
power management.
Offset 0x07,3FFC
31:16 ID
15:12 MAJ_REV
11:8 MIN_REV
7:0 APERTURE
LCD_MODULE_ID
R
0xA050
R
0x0
R
0x0
R
0x00
Module ID.
This field identifies the module as the LCD controller.
Major Revision ID. This field is incremented by 1 when changes
introduced in the module result in software incompatibility with the
previous version of the module. First version default = 0.
Minor Revision ID. This field is incremented by 1 when changes
introduced in the module result in software compatibility with the
previous version of the module. First version default = 0.
Aperture size. Identifies the MMIO aperture size in units of 4 KB for
the LCDC module. LCDC has an MMIO aperture size of 4 KB.
PNX15XX_PNX952X_SER_N_4
Product data sheet
Rev. 4.0 — 03 December 2007
© NXP B.V. 2007. All rights reserved.
10-352