PNX1502E Datasheet, PDF (597/828 Pages) NXP Semiconductors – Connected Media Processor

NXP Semiconductors
Volume 1 of 1
PNX15xx/952x Series
Chapter 19: Memory Based Scaler
Table 8: Memory Based Scaler (MBS) Registers …Continued
Bit Symbol
Acces
s
Value
Description
6
VSP_RGB
R/W 0
Color space mode, defines CCIR clamping range for VSP
0: processing in YUV color space
(CCIR range: 16 - 235(Y), 16 - 240(U/V))
1: processing in RGB color space
(CCIR range: 16 - 235)
5:4 VSP_MODE
R/W 0
Vertical processing mode
00: bypass mode
01: reserved
10: normal polyphase mode
11: reserved
3
HSP_CLAMP
R/W 0
Clamp mode for HSP
0: clamp to 0-255
1: clamp to CCIR range defined by HSP_RGB (bit 2)
2
HSP_RGB
R/W 0
Color space mode, defines CCIR clamping range for HSP
0: processing in YUV color space
(CCIR range: 16 - 235(Y), 16 - 240(U/V))
1: processing in RGB color space
(CCIR range: 16 - 235)
1:0 HSP_MODE
0
Horizontal processing mode
00: bypass mode
01: color space matrix mode
10: normal polyphase mode
11: transposed polyphase mode
Video Informations Registers
Offset 0x10 C040
Task FIFO
31:3 TASK_BASE
W
Scale task FIFO
Must be aligned to 8 byte boundary
2
Reserved
0
1:0 TASK_CMD
W
Command mode
00: process task descriptor at given base
01: start scaling with current register settings
1x: reserved
Offset 0x10 C044
Task Status 1
31:4 Reserved
0
3:0 TASK_PENDING
R
Number of pending scaling tasks (including current)
Offset 0x10 C048
Task Status 2
31:0 LAST_COMMAND
R
Last Command executed
Input Format Control Registers
Offset 0x10 C100
Input Format
PNX15XX_PNX952X_SER_N_4
Product data sheet
Rev. 4.0 — 03 December 2007
© NXP B.V. 2007. All rights reserved.
19-597