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TDA8029 Datasheet, PDF (31/59 Pages) NXP Semiconductors – Low power single card reader
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Philips Semiconductors
TDA8029
Low power single card reader
Table 47: Time-out counter configurations …continued
TOC[7:0] Operating mode
(hex)
65
Counter 1 is an 8-bit auto-reload counter, and counters 3 and 2 form a 16-bit counter. Counter 1 starts
counting the content of register TOR1 on the first start-bit (reception or transmission) detected on pin I/O after
65h is written in register TOC. When counter 1 reaches its terminal count, an interrupt is given, bit TO1 in
register USR is set and the counter automatically restarts the same count until it is stopped. It is not allowed to
change the content of register TOR1 during a count. Counters 3 and 2 are wired as a single 16-bit counter
and start counting the value in registers TOR3 and TOR2 when 65h is written in register TOC. When the
counter reaches its terminal count, an interrupt is given and bit TO3 is set within register USR. Both counters
are stopped when 00h is written in register TOC. Counters 3 and 2 shall be stopped by writing 05h in register
TOC before reloading new values in registers TOR2 and TOR3.
68
Counters 3, 2 and 1 are wired as a single 24-bit counter. Counting the value stored in registers TOR3, TOR2
and TOR1 is started after 68h is written in register TOC. The counter is stopped by writing 00h in register
TOC. It is not allowed to change the content of registers TOR3, TOR2 and TOR1 within a count.
71
Counter 1 is stopped, and counters 3 and 2 form a 16-bit counter. After writing this value, counting the value
stored in registers TOR3 and TOR2 is started on the first start-bit detected on pin I/O (reception or
transmission) and then on each subsequent start-bit. It is possible to change the content of registers TOR3
and TOR2 during a count, the current count will not be affected and the new count value will be taken into
account at the next start-bit. The counter is stopped by writing 00h in register TOC. In this configuration,
registers TOR3, TOR2 and TOR1 must not be all zero.
75
Counter 1 is an 8-bit auto-reload counter, and counters 3 and 2 form a 16-bit counter. After 75h is written in
register TOC, counter 1 starts counting the content of register TOR1 on the first start-bit (reception or
transmission) detected on pin I/O. When counter 1 reaches its terminal count, an interrupt is given, bit TO1 in
register USR is set and the counter automatically restarts the same count until it is stopped. Changing the
content of register TOR1 during a count is not allowed. Counting the value stored in registers TOR3 and TOR2
is started on the first start-bit detected on pin I/O (reception or transmission) after 75h is written, and then on
each subsequent start-bit. It is possible to change the content of registers TOR3 and TOR2 during a count,
the current count will not be affected and the new count value will be taken into account at the next start-bit.
The counter is stopped by writing 00h in register TOC. In this configuration, registers TOR3, TOR2 and TOR1
must not be all zero.
7C
Counters 3, 2 and 1 are wired as a single 24-bit counter. Counting the value stored in registers TOR3, TOR2
and TOR1 is started on the first start-bit detected on pin I/O (reception or transmission) after the value has
been written, and then on each subsequent start-bit. It is possible to change the content of registers TOR3,
TOR2 and TOR1 during a count. The current count will not be affected and the new count value will be taken
into account at the next start-bit. The counter is stopped by writing 00h in register TOC. In this configuration,
registers TOR3, TOR2 and TOR1 must not be all zero.
85
Same as value 05h, except that all the counters will be stopped at the end of the 12th ETU following the first
received start-bit detected after 85h has been written in register TOC.
E5
Same configuration as value 65h, except that counter 1 will be stopped at the end of the 12th ETU following
the first start-bit detected after E5h has been written in register TOC.
F1
Same configuration as value 71h, except that the 16-bit counter will be stopped at the end of the 12th ETU
following the first start-bit detected after F1h has been written in register TOC.
F5
Same configuration as value 75h, except the two counters will be stopped at the end of the 12th ETU following
the first start-bit detected after F5h has been written in register TOC.
9397 750 14145
Product data sheet
Rev. 03 — 22 February 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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