TDA8029 Datasheet, PDF (27/59 Pages) NXP Semiconductors – Low power single card reader

Philips Semiconductors
TDA8029
Low power single card reader
8.10 Smart card reader control registers
The TDA8029 has one analog interface for five contacts cards. The data to or from the
card are fed into an ISO UART.
The Card Select Register (CSR) contains a bit for resetting the ISO UART
(logic 0 = active). This bit is reset after power-on, and must be set to logic 1 before starting
any operation. It may be reset by software when necessary.
Dedicated registers allow to set the parameters of the ISO UART:
• Programmable Divider Register (PDR)
• Guard Time Register (GTR)
• UART Control Registers (UCR1 and UCR2)
• Clock Configuration Register (CCR).
The parameters of the ETU counters are set by:
• Time-Out Configuration register (TOC)
• Time-Out Registers (TOR1, TOR2 and TOR3).
The Power Control Register (PCR) is a dedicated register for controlling the power to the
card.
When the specific parameters of the card have been programmed, the UART may be
used with the following registers:
• UART Receive and Transmit Registers (URR and UTR)
• UART Status Register (USR)
• Mixed Status Register (MSR).
In reception mode, a FIFO of 1 to 8 characters may be used, and is configured with the
FIFO Control Register (FCR). This register is also used for the automatic retransmission
of NAKed characters in transmission mode.
The Hardware Status Register (HSR) gives the status of the supply voltage, the hardware
protections, the SDWN request and the card movements.
USR and HSR give interrupts on INT0_N when some of their bits have been changed.
MSR does not give interrupts, and may be used in polling mode for some operations. For
this use, the bit TBE/RBF within USR may be masked.
A 24-bit time-out counter may be started for giving an interrupt after a number of ETU
programmed in registers TOR1, TOR2 and TOR3. It will help the controller for processing
different real time tasks (ATR, WWT, BWT, etc.) mainly if controllers and card clock are
asynchronous.
This counter is configured with register TOC, that may be used as a 24-bit or as a
16-bit + 8-bit counter. Each counter may be set for starting to count once data written, on
detection of a start bit on I/O, or as auto-reload.
9397 750 14145
Product data sheet
Rev. 03 — 22 February 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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