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MC68HC05T16 Datasheet, PDF (85/128 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit | |||
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ON/OFF - OSD display on/off
1 (set) â OSD display on.
0 (clear) â OSD display off.
For the fading feature, the whole screen is divided into several 16-horizontal-line segments. Notice
that a row might not ï¬t into the 16-horizontal-line segments. It might cross two segments,
depending on the vertical position of a row. The way that fade-in feature works is that one line in
all 16-line segments will appear in the ï¬rst fading sequence; two lines, including the one line in the
ï¬rst fading sequence, will appear in the second fading sequence; four lines, including the two lines
in the second fading sequence, will appear in the third fading sequence; eight lines, including the
four lines in the third fading sequence, will appear in the fourth fading sequence; and ï¬nally, all
sixteen lines, including the eight lines in the fourth fading sequence, will appear in the ï¬fth fading
sequence. Fade-out feature works in the opposite manner, that is, the number of display lines to
be disappeared are 8 lines, 12 lines, 14 lines, 15 lines, and all 16 lines in each disappearance
sequence, respectively. Fade out sequence for a character in a row ï¬tting right into the
16-horizontal-line segment is illustrated in Figure 9-7. Fading rate is ï¬xed at 32 frames per
sequence. Therefore, it takes 160 frames to execute the fade function. At 60 Hz vertical frequency,
this will take ï¬ve plus seconds. Note that when display disappears, all output pins are not
tri-stated, rather they remain in their deserted states.
CDRC3 to CDRC0 - Terminated display rows
These status bits reï¬ect the number of row displays that have been terminated. These bits are
reset only by vertical ï¬yback and incremented by one every time a row display has been
terminated.
9
9.5.2 Frame Control Register 2
Address bit 7
$1E BR1
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
BR0 VFPOL HFPOL HTPOL FBPOL RGBPOL IPOL 0000 0000
BR1, BR0 - Blink rate select
These bits control the blinking rate of all symbols on the TV screen. The on/off ratio of blinking is
always 3/1.
VFPOL - VFLBK input polarity select
1 (set) â Vertical ï¬yback signal at VFLBK is active low.
0 (clear) â Vertical ï¬yback signal at VFLBK is active high.
MC68HC05T16
ON-SCREEN DISPLAY
TPG
MOTOROLA
9-15
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