MC68HC05T16 Datasheet, PDF (82/128 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

9.4.3 Row Horizontal Position Register
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$28 SHDW HP6 HP5 HP4 HP3 HP2 HP1 HP0 0000 0000
SHDW - Shadow/border select
1 (set) – Shadow feature is selected if RiBE is enabled. See Section 9.4.1.
0 (clear) – Border feature is selected if RiBE is disabled. See Section 9.4.1.
HP6 to HP0 - Horizontal Position
Each (HP6-HP0) step shifts the horizontal position of all four rows by 4 dots. The reference point
of shift is the leading edge of horizontal flyback signal. Note that there is only one Row Horizontal
Position register for all 4 row buffers, therefore all rows will have the same horizontal start point.
If (HP6-HP0) is so programmed that part of the row display goes beyond the beginning of a
horizontal flyback signal, display wrap-around occurs. That is, all lines of the row display will have
all dots before the nth horizontal flyback displayed on one line and all remaining dots after the nth
horizontal flyback, along with all dots of next line before the (n+1)th horizontal flyback displayed
on the next line.
9.4.4 Row Control Register 1
9
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$29 R3INTE R2INTE R1INTE R0INTE R3EN R2EN R1EN R0EN 0000 0000
RiINTE - Row interrupt
1 (set) – Row interrupt enabled.
0 (clear) – Row interrupt disabled.
Enable/disable interrupt of row i if one of the following conditions occur:
1) the part of the row i display which is not overridden by other overlapping
rows has been completed, or
2) the part of the row i display which does not overlap vertical retrace period
has been completed.
Note that for the case where row i is completely overlapped by other rows, row i display has never
really happened, that is, terminated upon its commencement, row i interrupt will never occur.
MOTOROLA
9-12
ON-SCREEN DISPLAY
TPG
MC68HC05T16