MC68HC05T16 Datasheet, PDF (37/128 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

LEVEL SENSITIVE TRIGGER
IRQ
V_DD
+
D
Q
&
EXTERNAL
INTERRUPT
INTERRUPT PIN
C
IRQ
REQUEST
Q
R
I BIT (CC)
4
+
(a) Interrupt Function Diagram
POWER-ON RESET
EXTERNAL RESET
EXTERNAL INTERRUPT
BEING SERVICED
IRQ
Wired ORed
Interrupt signals
IRQ
t_ILIH
t_ILIL
t_ILIL
EDGE SENSITIVE TRIGGER
CONDITION
The minimum pulse width t_ILIH is either
125ns (V_DD=5V) or 250ns (V_DD=3V).
The period t_ILIL should not be less than
the number of tcyc cycles it takes to ex-
ecute the interrupt service routine plus
21 tcyc cycles.
LEVEL SENSITIVE TRIGGER
CONDITION
if after servicing an interrupt the
external interrupt pins remain low, then
the next interrupt is recognized.
Normally used with wired OR
connection.
(b) Interrupt Mode Diagram
Figure 4-3 External Interrupt Circuit and Timing
MC68HC05T16
RESETS AND INTERRUPTS
TPG
MOTOROLA
4-7