MC68HC05T16 Datasheet, PDF (43/128 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

5
TIMERS
5
5.1
PROGRAMMABLE TIMER
The timer consists of a 16-bit free-running counter driven by a fixed divide-by-four prescaler. This
timer can be used for many purposes, including input waveform measurements while
simultaneously generating an output waveform. Pulse widths can vary from several microseconds
to many seconds. Figure 5-1 shows a block diagram for the Programmable Timer.
Because the timer has a 16-bit architecture, the I/O registers for the input capture and output
compare functions are pairs of 8-bit registers (high byte and low byte). Generally, assessing the
low byte of a specific timer function allows full control of that function. However, an access of the
high byte inhibits that specific timer function until the low byte is also accessed.
Note:
The I bit in the condition code register should be set while manipulating both the high
and low byte register of a specific timer function to ensure that an interrupt does not
occur.
Twelve 8-bit registers are associated with the programmable timer.
– Timer Control Register (TCR)
– Timer Status Register (TSR)
– Input Capture Register
– Output Compare 0 Register
– Output Compare 1 Register
– Counter Register
– Alternate Counter Register
$10
$11
High byte - $12, Low byte - $13
High byte - $14, Low byte - $15
High byte - $16, Low byte - $17
High byte - $18, Low byte - $19
High byte - $1A, Low byte - $1B
A description of each register is provided in the following paragraphs.
MC68HC05T16
TIMERS
TPG
MOTOROLA
5-1