M68HC128 Datasheet, PDF (85/362 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Operating Modes and Resource Mapping
Mode and Resource Mapping Registers
RFSTR1 and RFSTR0 — Register-Following Stretch Bits
These bits determine the amount of clock stretch on accesses to the 512-byte
register-following map. It is valid regardless of the state of the NDRF bit. In
single-chip and peripheral modes, these bits have no meaning or effect. See
Table 5-3.
Table 5-3. Register-Following Stretch Bit Function
RFSTR1 and RFSTR0
00
01
10
11
E Clocks Stretched
0
1
2
3
EXSTR1 and EXSTR0 — External Access Stretch Bit 1 and Bit 0
These bits determine the amount of clock stretch on accesses to the external
address space. In single-chip and peripheral modes, these bits have no
meaning or effect.
Table 5-4. Expanded Stretch Bit Function
EXSTR1 and EXSTR0
00
01
10
11
E Clocks Stretched
0
1
2
3
MAPROM — FLASH EEPROM/ROM Map Bit
This bit determines the location of the on-chip FLASH EEPROM/ROM. In
expanded modes, it is reset to 0. In single-chip modes, it is reset to 1. If ROMON
is 0, this bit has no meaning or effect.
1 = FLASH EEPROM/ROM is located from $8000 to $FFFF.
0 = FLASH EEPROM/ROM is located from $0000 to $7FFF.
ROMON — FLASH EEPROM/ROM Enable Bit
In expanded modes, ROMON is reset to 0. In single-chip modes, it is reset to 1.
If the internal RAM, registers, EEPROM, or BDM ROM (if active) are mapped to
the same space as the FLASH EEPROM/ROM, they will have priority over the
FLASH EEPROM/ROM.
1 = Enables the FLASH EEPROM/ROM in the memory map
0 = Disables the FLASH EEPROM/ROM in the memory map
M68HC12B Family — Rev. 9.0
MOTOROLA
Operating Modes and Resource Mapping
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Data Sheet
85