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M68HC128 Datasheet, PDF (216/362 Pages) Motorola, Inc – Microcontrollers
Serial Interface
Freescale Semiconductor, Inc.
TRANSFER
BEGIN
END
SCK (CPOL = 0)
SCK (CPOL = 1)
SAMPLE I
MOSI/MISO
CHANGE O
MOSI PIN
CHANGE O
MISO PIN
SEL SS (O)
MASTER ONLY
SEL SS (I)
tL
MSB first (LSBF= 0) :
LSB first (LSBF = 1) :
MSB
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
LSB
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Figure 14-13. SPI Clock Format 1 (CPHA = 1)
tT
LSB
MSB
tI tL
Minimum 1/2 SCK
for tT, tl, tL
14.3.3 SS Output
Available in master mode only, SS output is enabled with the SSOE bit in the
SP0CR1 register if the corresponding DDRS bit is set. The SS output pin is
connected to the SS input pin of the external slave device. The SS output
automatically goes low for each transmission to select the external device and it
goes high during each idling state to deselect external devices.
DDS7
0
0
1
1
Table 14-3. SS Output Selection
SSOE
0
1
0
1
Master Mode
SS input with MODF feature
Reserved
General-purpose output
SS output
Slave Mode
SS input
SS input
SS input
SS input
14.3.4 Bidirectional Mode (MOMI or SISO)
In bidirectional mode, the SPI uses only one serial data pin for external device
interface. The MSTR bit decides which pin to be used. The MOSI pin becomes a
serial data I/O (MOMI) pin for the master mode, and the MISO pin becomes a serial
data I/O (SISO) pin for the slave mode. The direction of each serial I/O pin depends
on the corresponding DDRS bit.
Data Sheet
216
Serial Interface
For More Information On This Product,
Go to: www.freescale.com
M68HC12B Family — Rev. 9.0
MOTOROLA