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M68HC128 Datasheet, PDF (328/362 Pages) Motorola, Inc – Microcontrollers
Freescale Semiconductor, Inc.
Development Support
18.4.1.1 SWI Dual Address Mode
In this mode, dual address-only breakpoints can be set, each of which causes a
software interrupt. This is the only breakpoint mode which can force the CPU to
execute an SWI. Program fetch tagging is the default in this mode; data
breakpoints are not possible. In dual mode each address breakpoint is affected by
the respective BKALE bit. The BKxRW, BKxRWE, BKMBH, and BKMBL bits are
ignored. In dual address mode, the BKDBE becomes an enable for the second
address breakpoint.
18.4.1.2 BDM Full Breakpoint Mode
This is a single full-featured breakpoint which causes the part to enter background
debug mode. BK1ALE, BK1RW, and BK1RWE have no meaning in full breakpoint
mode.
BKDBE enables data compare but has no meaning if BKPM = 1. BKMBH and
BKMBL allow masking of high and low byte compares but has no meaning if
BKPM = 1. BK0ALE enables compare of low address byte.
• Breakpoints are not allowed if the BDM mode is already active. Active mode
means the CPU is executing out of the BDM ROM.
• BDM should not be entered from a breakpoint unless the ENABLE bit is set
in the BDM. This is important because even if the ENABLE bit in the BDM is
negated, the CPU actually does execute the BDM ROM code. It checks the
ENABLE and returns if not set. If the BDM is not serviced by the monitor,
then the breakpoint would be re-asserted when the BDM returns to normal
CPU flow. There is no hardware to enforce restriction of breakpoint
operation if the BDM is not enabled.
18.4.1.3 BDM Dual Address Mode
This mode has dual address-only breakpoints, each of which causes the part to
enter background debug mode. In dual mode, each address breakpoint is affected
by the BKPM bit, the BKxALE bits, and the BKxRW and BKxRWE bits. In dual
address mode, the BKDBE becomes an enable for the second address breakpoint.
The BKMBH and BKMBL bits have no effect when in a dual address mode. BDM
may be entered by a breakpoint only if an internal signal from the BDM indicates
background debug mode is enabled. If BKPM = 1, then BKxRW, BKxRWE,
BKMBH, and BKMBL have no meaning.
• Breakpoints are not allowed if the BDM is already active. Active mode
means the CPU is executing out of the BDM ROM.
• BDM should not be entered from a breakpoint unless the ENABLE bit is set
in the BDM. This is important because even if the ENABLE bit in the BDM is
negated, the CPU actually does execute the BDM ROM code. It checks the
ENABLE and returns if not set. If the BDM is not serviced by the monitor,
then the breakpoint would be re-asserted when the BDM returns to normal
CPU flow. There is no hardware to enforce restriction of breakpoint
operation if the BDM is not enabled.
Data Sheet
328
Development Support
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M68HC12B Family — Rev. 9.0
MOTOROLA