M68HC128 Datasheet, PDF (70/362 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Resets and Interrupts
An interrupt that is assigned highest priority is still subject to global masking by the
I bit in the CCR or by any associated local bits. Interrupt vectors are not affected
by priority assignment. HPRIO can be written only while the I bit is set (interrupts
inhibited). Table 4-1 lists interrupt sources and vectors in default order of priority
for all devices except the MC68HC(9)12BC32. Table 4-2 lists the interrupt sources
and vectors for the MC68HC(9)12BC32.
Table 4-1. Interrupt Vector Map⁽¹⁾
Vector
Address
Interrupt Source
CCR
Mask
Local Enable
Register
Bit(s)
$FFFE, $FFFF Reset
None None
$FFFC, $FFFD
$FFFA, $FFFB
$FFF8, $FFF9
$FFF6, $FFF7
$FFF4, $FFF5
$FFF2, $FFF3
$FFF0, $FFF1
$FFEE, $FFEF
$FFEC, $FFED
$FFEA, $FFEB
$FFE8, $FFE9
$FFE6, $FFE7
$FFE4, $FFE5
$FFE2, $FFE3
$FFE0, $FFE1
$FFDE, $FFDF
$FFDC, $FFDD
$FFDA, $FFDB
$FFD8, $FFD9
$FFD6, $FFD7
$FFD4, $FFD5
$FFD2, $FFD3
$FFD0, $FFD1
$FF80–$FFC1
$FFC2–$FFC9
$FFCA, $FFCB
$FFCC, $FFCD
$FFCE, $FFCF
COP clock monitor fail reset
COP failure reset
Unimplemented instruction trap
SWI
XIRQ
IRQ
Real-time interrupt
Timer channel 0
Timer channel 1
Timer channel 2
Timer channel 3
Timer channel 4
Timer channel 5
Timer channel 6
Timer channel 7
Timer overflow
Pulse accumulator overflow
Pulse accumulator input edge
SPI serial transfer complete
SCI 0
Reserved
ATD
BDLC
Reserved (not implemented)
Reserved (implemented)
Pulse accumulator B overflow
Modulus down counter underflow
Reserved (implemented)
None
None
None
None
X bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
COPCTL
None
None
None
None
INTCR
RTICTL
TMSK1
TMSK1
TMSK1
TMSK1
TMSK1
TMSK1
TMSK1
TMSK1
TMSK2
PACTL
PACTL
SP0CR1
SC0CR2
—
ATDCTL2
BCR1
—
—
PBCTL
MCCTL
—
1. See Table 4-2 for the MC68HC(9)12BC32 interrupt vector map.
None
CME, FCME
COP rate selected
None
None
None
IRQEN
RTIE
C0I
C1I
C2I
C3I
C4I
C5I
C6I
C7I
TOI
PAOVI
PAI
SPIE
TIE, TCIE, RIE, ILIE
—
ASCIE
IE
—
—
PBOVI
MCZI
—
HPRIO Value
to Elevate
to Highest I Bit
—
—
—
—
—
—
$F2
$F0
$EE
$EC
$EA
$E8
$E6
$E4
$E2
$E0
$DE
$DC
$DA
$D8
$D6
$D4
$D2
$D0
$80–$C0
$C2–$C8
$CA
$CC
$CE
Data Sheet
70
Resets and Interrupts
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M68HC12B Family — Rev. 9.0
MOTOROLA