M68HC128 Datasheet, PDF (187/362 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Enhanced Capture Timer (ECT) Module
Timer Registers
Address: $009C–$009D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset: 0
0
0
0
0
0
0
0
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 13-27. Timer Input Capture/Output Compare Register 6 (TC6)
Address: $009E–$009F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset: 0
0
0
0
0
0
0
0
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 13-28. Timer Input Capture/Output Compare Register 7 (TC7)
Read: Anytime
Write: Anytime for output compare function
Depending on the TIOS bit for the corresponding channel, these registers are used
to latch the value of the free-running counter when a defined transition is sensed
by the corresponding input capture edge detector or to trigger an output action for
output compare.
Writes to these registers have no meaning or effect during input capture. All timer
input capture/output compare registers are reset to $0000.
M68HC12B Family — Rev. 9.0
MOTOROLA
Enhanced Capture Timer (ECT) Module
For More Information On This Product,
Go to: www.freescale.com
Data Sheet
187