M68HC128 Datasheet, PDF (239/362 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Byte Data Link Communications (BDLC)
BDLC MUX Interface
15.7.3.2 Logic 1
A logic 1 is defined as:
• An active-to-passive transition followed by a passive period 128 µs in length,
or
• A passive-to-active transition followed by an active period 64 µs in length
See Figure 15-5(B).
15.7.3.3 Normalization Bit (NB)
The NB symbol has the same property as a logic 1 or a logic 0. It is used only in
IFR message responses.
15.7.3.4 Break Signal (BREAK)
The BREAK signal is defined as a passive-to-active transition followed by an active
period of at least 240 µs (see Figure 15-5(C)).
15.7.3.5 Start-of-Frame Symbol (SOF)
The SOF symbol is defined as passive-to-active transition followed by an active
period 200 µs in length (see Figure 15-5(D)). This allows the data bytes which
follow the SOF symbol to begin with a passive bit, regardless of whether it is a logic
1 or a logic 0.
15.7.3.6 End-of-Data Symbol (EOD)
The EOD symbol is defined as an active-to-passive transition followed by a passive
period 200 µs in length (see Figure 15-5(E)).
15.7.3.7 End-of-Frame Symbol (EOF)
The EOF symbol is defined as an active-to-passive transition followed by a passive
period 280 µs in length (see Figure 15-5(F)). If no IFR byte is transmitted after an
EOD symbol is transmitted, another 80 µs the EOD becomes an EOF, indicating
completion of the message.
15.7.3.8 Inter-Frame Separation Symbol (IFS)
The IFS symbol is defined as a passive period 300 µs in length. The 20-µs IFS
symbol contains no transition, since when it is used it always appends to a 280-µs
EOF symbol (see Figure 15-5(G)).
15.7.3.9 Idle
An idle is defined as a passive period greater than 300 µs in length.
M68HC12B Family — Rev. 9.0
MOTOROLA
Byte Data Link Communications (BDLC)
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Data Sheet
239