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MC68HC05BD3 Datasheet, PDF (73/112 Pages) Motorola, Inc – HCMOS microcontroller | |||
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9
CPU CORE AND INSTRUCTION SET
This section provides a description of the CPU core registers, the instruction set and the
addressing modes of the MC68HC05BD3.
9.1
Registers
The MCU contains ï¬ve registers, as shown in the programming model of Figure 9-1. The interrupt
stacking order is shown in Figure 9-2.
7
0
Accumulator
7
0
Index register
15
7
0
00
Program counter
15
7
0
9
0000000011
Stack pointer
7
0
1 1 1 H I N Z C Condition code register
Carry / borrow
Zero
Negative
Interrupt mask
Half carry
Figure 9-1 Programming model
9.1.1 Accumulator (A)
The accumulator is a general purpose 8-bit register used to hold operands and results of
arithmetic calculations or data manipulations.
MC68HC05BD3
CPU CORE AND INSTRUCTION SET
TPG
MOTOROLA
9-1
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