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MC68HC05BD3 Datasheet, PDF (38/112 Pages) Motorola, Inc – HCMOS microcontroller
IRQN bit
&
+
&
External
Interrupt
VDD
Request
4
IRQ pin
D
Q
C
I BIT (CCR)
Q
R
Power-On Reset
+
External Reset
External Interrupt
being serviced
(read of vectors)
(a) Interrupt Function Diagram
IRQ
Wired ORed
Interrupt signals
IRQ
tILIH
tILIL
tILIL
EDGE SENSITIVE TRIGGER
CONDITION
The minimum pulse width tILIH is one
internal bus period. The period tILIL
should not be less than the number of
tCYC cycles it takes to execute the
interrupt service routine plus 21 tcyc
cycles.
LEVEL SENSITIVE TRIGGER
CONDITION
If after servicing an interrupt the IRQ
pin remains low, then the next interrupt
is recognized. Normally used with wired
OR connection.
Normally used with pull-up resistors for
wired-OR connection.
(b) Interrupt Mode Diagram
MOTOROLA
4-6
Figure 4-3 External Interrupt Circuit and Timing
RESETS AND INTERRUPTS
TPG
MC68HC05BD3