MC68HC05BD3 Datasheet, PDF (25/112 Pages) Motorola, Inc – HCMOS microcontroller

2.3.6 Port C and D Configuration Registers
Port C and Port D are shared with PWM, M-Bus and SSP. The configuration registers at $0A and
2
$0B are used to configure those I/O pins. They are default to zero after power-on reset. Setting
these bits will set the corresponding pins to the corresponding functions, except PC6 and PC7.
For example, setting SCL and SDA bits of register $0B will configure Port D pins 1 and 0 as M-Bus
pins, regardless of DDR1 and DDR0 settings.
Configuration Register 1
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$000A PWM15 PWM14 PWM13 PWM12 PWM11 PWM10 PWM9 PWM8 0000 0000
Configuration Register 2
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$000B HTTL VTTL
SCL SDA 0000 0000
PC7 and PC6 are shared with both PWM and SSP. When HTTL and VTTL in $000B are set, PC7
and PC6 are configured as HTTL and VTTL outputs respectively, regardless of the status of
PWM15 and PWM14 in $000A. That is, HTTL and VTTL settings override PWM15 and PWM14
settings.
PWM15
0
0
1
1
Table 2-2 Configuration for PC6 and PC7
HTTL
0
1
0
1
Result of PC7
PC7
HTTL
PWM15
HTTL
PWM14
0
0
1
1
VTTL
0
1
0
1
Result of PC6
PC6
VTTL
PWM14
VTTL
MC68HC05BD3
PIN DESCRIPTION AND I/O PORTS
TPG
MOTOROLA
2-5