MC68HC05BD3 Datasheet, PDF (43/112 Pages) Motorola, Inc – HCMOS microcontroller

Table 5-1 COP Reset and RTI Rates
RT1
0
0
1
1
Note:
Minimum COP reset period
RTI period
RT0
COP
E clock = 2MHz
RTI
E clock = 2MHz
0
E/16384/7/1
57.344 ms
E/16384/1
8.192 ms
1
E/16384/7/2
114.688 ms
E/16384/2
16.384 ms
0
E/16384/7/4
229.376ms
E/16384/4
32.768 ms
1
E/16384/7/8
458.752 ms
E/16384/8
65.536 ms
RT0 and RT1 should only be changed immediately after COP
watchdog timer has been reset.
5
MC68HC05BD3
MULTI-FUNCTION TIMER
TPG
MOTOROLA
5-3