MC68HC12 Datasheet, PDF (435/478 Pages) Motorola, Inc – The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit

Electrical Specifications
Tables of Data
Table 21-14. Multiplexed Expansion Bus Timing
V_DD = 5.0 Vdc ± 10%, V_SS = 0 Vdc, T_A = T_L to T_H, unless otherwise noted
Num
Characteristic^{(1), (2), (3), (4)}
Frequency of operation (E-clock frequency)
1 Cycle timet_cyc = 1/f_o
2 Pulse width, E lowPW_EL = t_cyc/2 + delay
3 Pulse width, E high⁽⁵⁾PW_EH = t_cyc/2 + delay
5 Address delay timet_AD = t_cyc/4 + delay
7 Address valid time to ECLK riset_AV = PW_EL − t_AD
8 Multiplexed address hold timet_MAH = t_cyc/4 + delay
9 Address Hold to Data Valid
10 Data Hold to High Zt_DHZ = t_AD − 20
11 Read data setup time
12 Read data hold time
13 Write data delay timet_DDW = t_cyc/4 + delay
14 Write data hold timet_DHW = t_cyc/4 + delay
15 Write data setup time⁽⁵⁾t_DSW = PW_EH − t_DDW
16 Read/write delay timet_RWD = t_cyc/4 + delay
17 Read/write valid time to E riset_RWV = PW_EL − t_RWD
18 Read/write hold timet_RWH = t_cyc/4 + delay
19 Low strobe⁽⁶⁾ delay timet_LSD = t_cyc/4 + delay
20 Low strobe⁽⁶⁾ valid time to E riset_LSV = PW_EL − t_LSD
21 Low strobe⁽⁶⁾ hold timet_LSH = t_cyc/4 + delay
22 Address access time⁽⁵⁾t_ACCA = t_cyc − t_AD − t_DSR
23 Access time from E rise⁽⁵⁾t_ACCE = PW_EH − t_DSR
24 DBE delay from ECLK rise⁽⁵⁾t_DBED = t_cyc/4 + delay
25 DBE valid timet_DBE = PW_EH − t_DBED
26 DBE hold time from ECLK fall
Delay
—
−2
−2
14
—
−16
—
—
—
—
14
−11
—
19
—
−26
26
—
−26
—
—
20
—
Symbol
f_o
t_cyc
PW_EL
PW_EH
t_AD
t_AV
t_MAH
t_AHDS
t_DHZ
t_DSR
t_DHR
t_DDW
t_DHW
t_DSW
t_RWD
t_RWV
t_RWH
t_LSD
t_LSV
t_LSH
t_ACCA
t_ACCE
t_DBED
t_DBE
t_DBEH
8 MHz
Min Max
0.004 8.0
0.125 250
60
60
45
15
15
5
20
38
0
45
20
15
50
10
5
57
3
5
26
22
51
9
0
10
1. All timings are calculated for normal port drives.
2. Crystal input is required to be within 45% to 55% duty.
3. Reduced drive must be off to meet these timings.
4. Unequalled loading of pins will affect relative timing numbers.
5. This characteristic is affected by clock stretch.
Add N × t_cyc where N = 0, 1, 2, or 3, depending on the number of clock stretches.
6. Without TAG enabled.
Unit
MHz
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MC68HC912DT128A — Rev 4.0
MOTOROLA
Electrical Specifications
Technical Data
435