MC68HC12 Datasheet, PDF (274/478 Pages) Motorola, Inc – The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit

Enhanced Capture Timer
bit is set, reads of the MCCNT will return the contents of the load
register.
If a $0000 is written into MCCNT and modulus counter while LATQ and
BUFEN in ICSYS ($AB) register are set, the input capture and pulse
accumulator registers will be latched.
With a $0000 write to the MCCNT, the modulus counter will stay at zero
and does not set the MCZF flag in MCFLG register.
If modulus mode is enabled (MODMC=1), a write to this address will
update the load register with the value written to it. The count register will
not be updated with the new value until the next counter underflow.
The FLMC bit in MCCTL ($A6) can be used to immediately update the
count register with the new value if an immediate load is desired.
If modulus mode is not enabled (MODMC=0), a write to this address will
clear the prescaler and will immediately update the counter register with
the value written to it and down-counts once to $0000.
TC0H — Timer Input Capture Holding Register 0
Bit 7
6
5
4
3
2
Bit 15
14
13
12
11
10
Bit 7
6
5
4
3
2
TC1H — Timer Input Capture Holding Register 1
Bit 7
6
5
4
3
2
Bit 15
14
13
12
11
10
Bit 7
6
5
4
3
2
TC2H — Timer Input Capture Holding Register 2
Bit 7
6
5
4
3
2
Bit 15
14
13
12
11
10
Bit 7
6
5
4
3
2
TC3H — Timer Input Capture Holding Register 3
Bit 7
6
5
4
3
2
Bit 15
14
13
12
11
10
Bit 7
6
5
4
3
2
$00B8–$00B9
1
Bit 0
9
Bit 8
1
Bit 0
$00BA–$00BB
1
Bit 0
9
Bit 8
1
Bit 0
$00BC–$00BD
1
Bit 0
9
Bit 8
1
Bit 0
$00BE–$00BF
1
Bit 0
9
Bit 8
1
Bit 0
Technical Data
274
Enhanced Capture Timer
MC68HC912DT128A — Rev 4.0
MOTOROLA