MC68HC12 Datasheet, PDF (404/478 Pages) Motorola, Inc – The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit

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complete the requested write operation before a new serial command
disturbs the BDM SHIFTER register.
The external host should delay about 64 target BDMCLK cycles after a
TRACE1 or GO command before starting any new serial command. This
delay is needed because the BDM SHIFTER register is used as a
temporary data holding register during the exit sequence to user code.
BDM logic retains control of the internal buses until a read or write is
completed.If an operation can be completed in a single cycle, it does not
intrude on normal CPU12 operation.However, if an operation requires
multiple cycles, CPU12 clocks are frozen until the operation is complete.
20.4.4 BDM Lockout
The access to the MCU resources by BDM may be prevented by
enabling the BDM lockout feature. When enabled, the BDM lockout
mechanism prevents the BDM from being active. In this case the BDM
ROM is disabled and does not appear in the MCU memory map.
The BDM lockout is enabled by clearing NOBDML bit of EEMCR
register. The NOBDML bit is loaded at reset from the SHADOW word of
EEPROM module. Modifying the state of the NOBDML and
corresponding EEPROM SHADOW bit is only possible in special modes.
Please refer to EEPROM Memory for NOBDML information.
20.4.4.1 Enabling the BDM lockout
Enabling the BDM lockout feature is only possible in special modes
(SMODN=0) and is accomplished by the following steps.
1. Remove the SHADOW word protection by clearing SHPROT bit in
EEPROT register.
2. Clear NOSHW bit in EEMCR register to make the SHADOW word
visible at $0FC0-$0FC1.
3. Program bit 7 of the high byte of the SHADOW word like a regular
EEPROM location at address $0FC0 (write $7F into address
$0FC0). Do not program other bits of the high byte of the
Technical Data
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MC68HC912DT128A — Rev 4.0
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