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MC68HC12 Datasheet, PDF (126/478 Pages) Motorola, Inc – The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit | |||
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EEPROM Memory
A steady internal self-time clock is required to provide accurate counts
to meet EEPROM program/erase requirements. This clock is generated
via by a programmable 10-bit prescaler register. Automatic
program/erase termination is also provided.
In ordinary situations, with crystal operating properly, the steady internal
self-time clock is derived from the input clock source (EXTALi). The
divider value is as in EEDIVH:EEDIVL. In limp-home mode, where the
oscillator clock has malfunctioned or is unavailable, the self-time clock is
derived from the PLL at a nominal fVCOMIN using a predefined divider
value of $0023. Program/erase operation is not guaranteed in limp-
home mode.
CAUTION:
It is strongly recommended that program/erase operation is terminated
in the event of loss of crystal, either by the application software (clearing
EEPGM & EELAT bits) when entering limp home mode or by enabling
the clock monitor to generate a clock monitor reset. This will prevent
unnecessary stress on the emulated EEPROM during oscillator failure.
9.5 EEPROM Control Registers
EEDIVH â EEPROM Modulus Divider
$00EE
Bit 7
6
5
4
3
2
1
Bit 0
0
0
0
0
0
0
EEDIV9 EEDIV8
RESET:
0
0
0
0
0
0
â(1)
â(1)
1. Loaded from SHADOW word.
EEDIVL â EEPROM Modulus Divider
RESET:
Bit 7
EEDIV7
â(1)
6
EEDIV6
â(1)
5
EEDIV5
â(1)
1. Loaded from SHADOW word.
4
EEDIV4
â(1)
3
EEDIV3
â(1)
2
EEDIV2
â(1)
1
EEDIV1
â(1)
Bit 0
EEDIV0
â(1)
$00EF
Technical Data
126
EEPROM Memory
MC68HC912DT128A â Rev 4.0
MOTOROLA
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