MC68HC12 Datasheet, PDF (106/478 Pages) Motorola, Inc – The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit

Bus Control and Input/Output
PORTB — Port B Register
$0001
Single Chip
RESET:
Expanded
& Periph:
Expanded
narrow
Bit 7
PB7
—
ADDR7/
DATA7
ADDR7
6
PB6
—
ADDR6/
DATA6
ADDR6
5
PB5
—
ADDR5/
DATA5
ADDR5
4
PB4
—
ADDR4/
DATA4
ADDR4
3
PB3
—
ADDR3/
DATA3
ADDR3
2
PB2
—
ADDR2/
DATA2
ADDR2
1
PB1
—
ADDR1/
DATA1
ADDR1
Bit 0
PB0
—
ADDR0/
DATA0
ADDR0
Bits PB[7:0] are associated with addresses ADDR[7:0] and DATA[7:0]
(except in narrow mode) respectively. When this port is not used for
external addresses such as in single-chip mode, these pins can be
used as general-purpose I/O. DDRB determines the primary direction
of each pin. This register is not in the on-chip map in expanded and
peripheral modes. Read and write anytime.
DDRB — Port B Data Direction Register
$0003
RESET:
Bit 7
DDB7
0
6
DDB6
0
5
DDB5
0
4
DDB4
0
3
DDB3
0
2
DDB2
0
1
DDB1
0
Bit 0
DDB0
0
This register determines the primary direction for each port B pin
when functioning as a general-purpose I/O port. DDRB is not in the
on-chip map in expanded and peripheral modes. Read and write
anytime.
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
PORTE — Port E Register
$0008
BIT 7
6
5
4
3
2
PE7
PE6
PE5
PE4
PE3
PE2
RESET:
—
—
—
—
—
—
Alt. Pin
Function
DBE or
ECLK or
CAL
MODB or
IPIPE1 or
CGMTST
MODA or
IPIPE0
ECLK
LSTRB or
TAGLO
R/W
1
BIT 0
PE1
PE0
—
—
IRQ
XIRQ
This register is associated with external bus control signals and
interrupt inputs, including data bus enable (DBE), mode select
(MODB/IPIPE1, MODA/IPIPE0), E clock, size (LSTRB), read/write
Technical Data
106
Bus Control and Input/Output
MC68HC912DT128A — Rev 4.0
MOTOROLA