MC68HC12 Datasheet, PDF (128/478 Pages) Motorola, Inc – The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit

EEPROM Memory
EEMCR — EEPROM Module Configuration
Bit 7
6
5
4
3
NOBDML NOSHW _Reserved⁽¹⁾ _FPOPEN⁽²⁾
1
RESET:
—⁽³⁾
—⁽³⁾
—⁽³⁾
—⁽³⁾
1
2
EESWAI
1
1
PROTLCK
0
Bit 0
DMY
0
1. Bit 5 has a test function and should not be programmed.
2. The FPOPEN bit is available only on the 0L05H and later mask sets. For previous masks, this bit is reserved.
3. Loaded from SHADOW word.
$00F0
NOTE:
Bits[7:4] are loaded at reset from the EEPROM SHADOW word.
The bits 5 and 4 are reserved for test purposes. These locations in
SHADOW word should not be programmed otherwise some locations of
regular EEPROM array will not be more visible.
NOBDML — Background Debug Mode Lockout Disable
0 = The BDM lockout is enabled.
1 = The BDM lockout is disabled.
Loaded from SHADOW word at reset.
Read anytime. Write anytime in special modes (SMODN=0).
NOTE:
NOSHW — SHADOW Word Disable
0 = The SHADOW word is enabled and accessible at address
$0FC0-$0FC1.
1 = Regular EEPROM array at address $0FC0-$0FC1.
Loaded from SHADOW word at reset.
Read anytime. Write anytime in special modes (SMODN=0).
When NOSHW cleared, the regular EEPROM array bytes at address
$0FC0 and $0FC1 are not visible. The SHADOW word is accessed
instead for both read and program/erase operations. Bits[7:4] from
the high byte of the SHADOW word, $0FC0, are loaded to
EEMCR[7:4]. Bits[1:0] from the high byte of the SHADOW word,
$0FC0,are loaded to EEDIVH[1:0]. Bits[7:0] from the low byte of the
SHADOW word, $0FC1,are loaded to EEDIVL[7:0]. BULK
program/erase only applies if SHADOW word is enabled.
Bit 6 from high byte of SHADOW word should not be programmed in
order to have the full EEPROM array visible.
Technical Data
128
EEPROM Memory
MC68HC912DT128A — Rev 4.0
MOTOROLA