MC68HC12 Datasheet, PDF (17/478 Pages) Motorola, Inc – The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit

Technical Data — MC68HC912DT128A
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MC68HC912DT128A Block Diagram . . . . . . . . . . . . . . . . . . . . 30
MC68HC912DG128A Block Diagram. . . . . . . . . . . . . . . . . . . . 31
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Pin Assignments in 112-pin QFP for MC68HC912DT128A . . . 42
Pin Assignments in 112-pin QFP for MC68HC912DG128A . . .43
112-pin QFP Mechanical Dimensions (case no. 987) . . . . . . . 44
PLL Loop FIlter Connections . . . . . . . . . . . . . . . . . . . . . . . . . .46
External Oscillator Connections . . . . . . . . . . . . . . . . . . . . . . . .48
MC68HC912DT128A Memory Map after reset. . . . . . . . . . . . 100
MC68HC912DT128A Memory Paging . . . . . . . . . . . . . . . . . .101
STOP Key Wake-up Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Internal Clock Relationships . . . . . . . . . . . . . . . . . . . . . . . . . . 159
PLL Functional Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .160
Clock Loss during Normal Operation . . . . . . . . . . . . . . . . . . .164
No Clock at Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . .166
STOP Exit and Fast STOP Recovery . . . . . . . . . . . . . . . . . . . 168
Clock Generation Chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
Clock Chain for SCI0, SCI1, RTI, COP. . . . . . . . . . . . . . . . . . 183
Clock Chain for ECT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
Clock Chain for MSCAN, SPI, ATD0, ATD1 and BDM . . . . . . 185
MC68HC912DT128A Colpitts Oscillator Architecture. . . . . . .195
MC68HC912Dx128C Colpitts Oscillator Architecture. . . . . . .198
MC68HC912Dx128C Crystal with DC Blocking Capacitor . . . 210
MC68HC912Dx128P Pierce Oscillator Architecture. . . . . . . .213
Block Diagram of PWM Left-Aligned Output Channel . . . . . . 226
Block Diagram of PWM Center-Aligned Output Channel . . . . 227
PWM Clock Sources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Timer Block Diagram in Latch Mode. . . . . . . . . . . . . . . . . . . .243
Timer Block Diagram in Queue Mode. . . . . . . . . . . . . . . . . . . 244
MC68HC912DT128A — Rev 4.0
MOTOROLA
List of Figures
Technical Data
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