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M38002M4 Datasheet, PDF (97/173 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER
2.4 Processor mode
2.4.1 Memory map of processor mode
APPLICATION
2.4 Processor mode
003B16 CPU mode register (CPUM)
Fig. 2.4.1 Memory map of processor mode related register
2.4.2 Related register
CPU mode register
b7 b6 b5 b4 b3 b2 b1 b0
CPU mode register (CPUM) [Adress : 3B16 ]
B
Name
Function
0 Processor mode bits
1
00 : Single-chip mode
01 : Memory expansion mode
10 : Microprocessor mode
11 : Not available
2 Stack page selection
0 : 0 page
bit
1 : 1 page
3 Nothing is allocated for these bits. These are write
4 disabled bits. When these bits are read out, the
5 values are “0.”
6
7
T An initial value of bit 1 is determined by a level of the CNVSS pin.
At reset R W
0
T
0
!
0
!
0
!
0
!
0
!
0
!
Fig. 2.4.2 Structure of CPU mode register
3800 GROUP USER’S MANUAL
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