M38002M4 Datasheet, PDF (107/173 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPENDIX
3.1 Electrical characteristics
Table 3.1.6 Switching characteristics (1) (VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
tWH(SCLK)
tWL(SCLK)
td(SCLK–TXD)
tv(SCLK–TXD)
t r(SCLK )
tf(SCLK)
tr(CMOS)
tf(CMOS)
Parameter
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time (Note 2)
CMOS output falling time (Note 2)
Test conditions
Fig. 3.1.1
Limits
Min.
Typ.
tc(SCLK)/2–30
tc(SCLK)/2–30
–30
10
10
Note1: When the P45/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
2: XOUT pin is excluded.
Unit
Max.
ns
ns
140 ns
ns
30 ns
30 ns
30 ns
30 ns
Table 3.1.7 Switching characteristics (2) (VCC = 3.0 to 4.0 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
tWH(SCLK)
tWL(SCLK)
td(SCLK–TXD)
tv(SCLK–TXD)
tr(SCLK)
tf(SCLK)
tr(CMOS)
tf(CMOS)
Parameter
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time (Note 2)
CMOS output falling time (Note 2)
Test conditions
Fig. 3.1.1
Limits
Min.
Typ.
tc(SCLK)/2–50
tc(SCLK)/2–50
–30
20
20
Note1: When the P45/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
2: XOUT pin is excluded.
Unit
Max.
ns
ns
350 ns
ns
50 ns
50 ns
50 ns
50 ns
3800 GROUP USER’S MANUAL
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