M38002M4 Datasheet, PDF (135/173 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPENDIX
3.5 List of registers
Timer XY mode register
b7 b6 b5 b4 b3 b2 b1 b0
Timer XY mode register (TM) [Address : 2316]
B
Name
0 Timer X operating mode bit
1
Function
b1 b0
0 0 : Timer mode
0 1 : Pulse output mode
1 0 : Event counter mode
1 1 : Pulse width measurement mode
At reset _{R W}
0
0
2 CNTR0 active edge switch bit ^{It depends on the operating mode}
0
of the Timer X (refer to Table 3.5.1).
3 ^{Timer X count stop bit}
0 : Count start
1 : Count stop
0
4 Timer Y operating mode bit
b5 b4
0 0 : Timer mode
0
0 1 : Pulse output mode
5
1 0 : Event counter mode
0
1 1 : Pulse width measurement mode
6 ^{CNTR1 active edge switch bit It depends on the operating mode} ₀
of the Timer Y (refer to Table 3.5.1).
7 ^{Timer Y count stop bit}
0 : Count start
0
1 : Count stop
Fig. 3.5.11 Structure of Timer XY mode register
Table. 3.5.1 Function of CNTR0/CNTR1 edge switch bit
Operating mode of
Timer X/Timer Y
Timer mode
Function of CNTR0/CNTR1 edge switch bit (bits 2 and 6)
• Generation of CNTR0/CNTR1 interrupt request : Falling edge
“0”
(No effect on timer count)
• Generation of CNTR0/CNTR1 interrupt request : Rising edge
“1”
(No effect on timer count)
Pulse output mode
• Start of pulse output : From “H” level
“0”
• Generation of CNTR0/CNTR1 interrupt request : Falling edge
• Start of pulse output : From “L” level
“1”
• Generation of CNTR0/CNTR1 interrupt request : Rising edge
Event counter mode
• Timer X/Timer Y : Count of rising edge
“0”
• Generation of CNTR0/CNTR1 interrupt request : Falling edge
• Timer X/Timer Y : Count of falling edge
“1”
• Generation of CNTR0/CNTR1 interrupt request : Rising edge
Pulse width measurement mode
• Timer X/Timer Y : Measurement of “H” level width
“0”
• Generation of CNTR0/CNTR1 interrupt request : Falling edge
• Timer X/Timer Y : Measurement of “L” level width
“1”
• Generation of CNTR0/CNTR1 interrupt request : Rising edge
3800 GROUP USER’S MANUAL
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