M38002M4 Datasheet, PDF (73/173 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.3 Serial I/O
Serial I/O control register
b7 b6 b5 b4 b3 b2 b1 b0
Serial I/O control register (SIOCON) [Address : 1A16]
B
Name
0 ^{BRG count source}
selection bit (CSS)
1 ^{Serial I/O synchronous clock}
selection bit (SCS)
2 SRDY output enable bit
(SRDY)
3 ^{Transmit interrupt}
source selection bit
(TIC)
4 Transmit enable bit (TE)
5 Receive enable bit (RE)
6 Serial I/O mode
selection bit (SIOM)
7 Serial I/O enable bit
(SIOE)
Function
0 : f(XIN)
1 : f(XIN)/4
At selecting clock synchronous serial I/O
0 : BRG output divided by 4
1 : External clock input
At selecting UART
0 : BRG output divided by 16
1 : External clock input divided by 16
At reset _{R W}
0
0
0 : I/O port (P47)
0
1 : SRDY output pin
0 : Transmit buffer empty
0
1 : Transmit shift operating
completion
0 : Transmit disabled
0
1 : Transmit enabled
0 : Receive disabled
0
1 : Receive enabled
0 : UART
0
1 : Clock synchronous serial I/O
0 : Serial I/O disabled
0
(P44–P47 : I/O port)
1 : Serial I/O enabled
(P44–P47 : Serial I/O function pin)
Fig. 2.3.4 Structure of Serial I/O control register
UART control register
b7 b6 b5 b4 b3 b2 b1 b0
UART control register (UARTCON) [Address : 1B16]
B
Name
Function
0 ^{Character length}
selection bit (CHAS)
0 : 8 bits
1 : 7 bits
1 Parity enable bit
(PARE)
2 Parity selection bit
(PARS)
0 : Parity checking disabled
1 : Parity checking enabled
0 : Even parity
1 : Odd parity
3 Stop bit length selection
0 : 1 stop bit
bit (STPS)
1 : 2 stop bits
4 P45/TxD P-channel
output disable bit
(POFF)
In output mode
0 : CMOS output
1 : N-channel open-drain
output
5 Nothing is allocated for these bits. These are write
6 disabled bits. When these bits are read out, the
7 ^{values are “1.”}
At reset _{R W}
0
0
0
0
0
1
5
1
5
1
5
Fig. 2.3.5 Structure of UART control register
3800 GROUP USER’S MANUAL
2-25