M38002M4 Datasheet, PDF (87/173 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.3 Serial I/O
(3) Cyclic transmission or reception of block data (data of a specified number of bytes)
between microcomputers
[without using an automatic transfer]
Outline : When a clock synchronous serial I/O is used for communication, synchronization of the clock
and the data between the transmitting and receiving sides may be lost because of noise
included in the synchronizing clock. Thus, it is necessary to be corrected constantly. This
“heading adjustment” is carried out by using the interval between blocks in this example.
SCLK
RXD
TXD
Master unit
SCLK
TXD
RXD
Slave unit
Fig. 2.3.24 Connection diagram [Cyclic transmission or reception of block data between
microcomputers]
Specifications : • The serial I/O is used (clock synchronous serial I/O is selected).
• Synchronous clock frequency : 131 kHz (f(XIN) = 4.19 MHz is divided by 32)
• Byte cycle: 488 µs
• Number of bytes for transmission or reception : 8 byte/block
• Block transfer cycle : 16 ms
• Block transfer period : 3.5 ms
• Interval between blocks : 12.5 ms
• Heading adjustive time : 8 ms
Limitations of the specifications
1. Reading of the reception data and setting of the next transmission data must be completed
within the time obtained from “byte cycle – time for transferring 1-byte data” (in this example,
the time taken from generating of the Serial I/O receive interrupt request to generating of the
next synchronizing clock is 431 µs).
2. “Heading adjustive time < interval between blocks” must be satisfied.
3800 GROUP USER’S MANUAL
2-39