M38002M4 Datasheet, PDF (167/173 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPENDIX
3.9 Machine instructions
Addressing mode
Processor status register
ZP, X
ZP, Y
ABS ABS, X ABS, Y IND ZP, IND IND, X IND, Y
REL
SP 7 6 5 4 3 2 1 0
OP n # OP n # OP n # OP n # OP n # OP n # OP n # OP n # OP n # OP n # OP n # N V T B D I Z C
95 5 2
8D 5 3 9D 6 3 99 6 3
81 7 2 91 7 2
••••••••
••••••••
96 5 2 8E 5 3
••••••••
94 5 2
8C 5 3
••••••••
N• • • • • Z•
N• • • • • Z•
N• • • • • Z•
N• • • • • Z•
N• • • • • Z•
••••••••
N• • • • • Z•
••••••••
Symbol
IMP
IMM
A
BIT, A
ZP
BIT, ZP
ZP, X
ZP, Y
ABS
ABS, X
ABS, Y
IND
ZP, IND
IND, X
IND, Y
REL
SP
C
Z
I
D
B
T
V
N
Contents
Implied addressing mode
Immediate addressing mode
Accumulator or Accumulator addressing mode
Accumulator bit relative addressing mode
Zero page addressing mode
Zero page bit relative addressing mode
Zero page X addressing mode
Zero page Y addressing mode
Absolute addressing mode
Absolute X addressing mode
Absolute Y addressing mode
Indirect absolute addressing mode
Zero page indirect absolute addressing mode
Indirect X addressing mode
Indirect Y addressing mode
Relative addressing mode
Special page addressing mode
Carry flag
Zero flag
Interrupt disable flag
Decimal mode flag
Break flag
X-modified arithmetic mode flag
Overflow flag
Negative flag
Symbol
+
–V
V
V–
–
←
X
Y
S
PC
PS
PCH
PCL
ADH
ADL
FF
nn
M
M(X)
M(S)
M(ADH, ADL)
M(00, ADL)
Ab
Mb
OP
n
#
Contents
Addition
Subtraction
Logical OR
Logical AND
Logical exclusive OR
Negation
Shows direction of data flow
Index register X
Index register Y
Stack pointer
Program counter
Processor status register
8 high-order bits of program counter
8 low-order bits of program counter
8 high-order bits of address
8 low-order bits of address
FF in Hexadecimal notation
Immediate value
Memory specified by address designation of any ad-
dressing mode
Memory of address indicated by contents of index
register X
Memory of address indicated by contents of stack
pointer
Contents of memory at address indicated by ADH and
ADL, in ADH is 8 high-order bits and ADL is 8 low-or-
der bits.
Contents of address indicated by zero page ADL
1 bit of accumulator
1 bit of memory
Opcode
Number of cycles
Number of bytes
3800 GROUP USER’S MANUAL
3-65