M1A3P250-1VQ100I Datasheet, PDF (86/210 Pages) Microsemi Corporation – ProASIC3 Flash Family FPGAs with Optional Soft ARM Support

ProASIC3 Flash Family FPGAs
t_PD
A
NAND2 or
Any Combinatorial
Y
B
Logic
VCC
t_PD = MAX(t_PD(RR), t_PD(RF), t_PD(FF), t_PD(FR))
where edges are applicable for the particular
combinatorial cell
A, B, C
50%
50%
VCC
GND
OUT
GND
VCC
OUT
50%
t_PD
(RR)
t_PD
(RF)
50%
Figure 2-24 • Timing Model and Waveforms
t_PD
(FF)
t_PD
(FR)
GND
50%
50%
Revision 15
2- 81