M1A3P250-1VQ100I Datasheet, PDF (72/210 Pages) Microsemi Corporation – ProASIC3 Flash Family FPGAs with Optional Soft ARM Support

ProASIC3 Flash Family FPGAs
Table 2-93 • Minimum and Maximum DC Input and Output Levels
DC Parameter
Description
Min. Max.
VCCI
Supply Voltage
3.0
VOL
Output Low Voltage
0.96 1.27
VOH
Output High Voltage
1.8 2.11
VIL, VIH
Input Low, Input High Voltages
0
3.6
VODIFF
Differential Output Voltage
0.625 0.97
VOCM
Output Common-Mode Voltage
1.762 1.98
VICM
Input Common-Mode Voltage
1.01 2.57
VIDIFF
Input Differential Voltage
300
Min. Max.
3.3
1.06 1.43
1.92 2.28
0
3.6
0.625 0.97
1.762 1.98
1.01 2.57
300
Min. Max.
3.6
1.30 1.57
2.13 2.41
0
3.6
0.625 0.97
1.762 1.98
1.01 2.57
300
Units
V
V
V
V
V
V
V
mV
Table 2-94 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
1.64
1.94
Cross point
Note: *Measuring point = V_trip. See Table 2-22 on page 2-21 for a complete table of trip points.
Timing Characteristics
Table 2-95 • LVPECL
Commercial-Case Conditions: T_J = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Speed Grade
t_DOUT
t_DP
t_DIN
t_PY
Units
Std.
0.66
1.80
0.04
1.40
ns
–1
0.56
1.53
0.04
1.19
ns
–2
0.49
1.34
0.03
1.05
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Revision 15
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