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M1A3P250-1VQ100I Datasheet, PDF (68/210 Pages) Microsemi Corporation – ProASIC3 Flash Family FPGAs with Optional Soft ARM Support
ProASIC3 Flash Family FPGAs
Table 2-85 • 1.5 V LVCMOS Low Slew
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Applicable to Standard I/O Banks
Drive
Strength
2 mA
Speed
Grade
Std.
tDOUT
0.66
tDP
12.33
tDIN
0.04
tPY
1.42
tEOUT
0.43
tZL
11.79
tZH
12.33
tLZ
2.45
tHZ
2.32
Units
ns
–1
0.56 10.49 0.04 1.21 0.36 10.03 10.49 2.08 1.98 ns
–2
0.49 9.21 0.03 1.06 0.32 8.81 9.21 1.83 1.73 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
3.3 V PCI, 3.3 V PCI-X
Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI Bus
applications.
Table 2-86 • Minimum and Maximum DC Input and Output Levels
3.3 V PCI/PCI-X
VIL
VIH
VOL VOH IOL IOH IOSL
IOSH IIL IIH
Drive Strength
Min. Max. Min. Max. Max,. Min.
Max.
V
V
V
V
V
V mA mA mA1
Max.
mA1 µA2 µA2
Per PCI specification
Per PCI curves
10 10
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
AC loadings are defined per the PCI/PCI-X specifications for the datapath; Microsemi loadings for enable
path characterization are described in Figure 2-10.
R = 25Ω
Test Point
Datapath
R to VCCI for tDP (F)
R to GND for tDP (R)
R = 1 kΩ
Test Point
Enable Path
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
10 pF for tZH / tZHS / tZL / tZLS
5 pF for tHZ / tLZ
Figure 2-10 • AC Loading
AC loadings are defined per PCI/PCI-X specifications for the datapath; Microsemi loading for tristate is
described in Table 2-87.
Table 2-87 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
0
Note:
3.3
0.285 * VCCI for tDP(R)
0.615 * VCCI for tDP(F)
*Measuring point = Vtrip. See Table 2-22 on page 2-21 for a complete table of trip points.
CLOAD (pF)
10
Revision 15
2- 63