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| M1A3P250-1VQ100I Datasheet, PDF (21/210 Pages) Microsemi Corporation – ProASIC3 Flash Family FPGAs with Optional Soft ARM Support | |||
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ProASIC3 Flash Family FPGAs
D
From Array
tDOUT
DQ
CLK
I/O Interface
tDP
DOUT
PAD
Std
Load
tDP = MAX(tDP(R), tDP(F))
tDOUT = MAX(tDOUT(R), tDOUT(F))
tDOUT
(R)
VCC
tDOUT
(F)
D
50%
50%
0V
VCC
DOUT
PAD
50%
Vtrip
tDP
(R)
50%
0V
VOH
Vtrip
VOL
tDP
(F)
Figure 2-4 ⢠Output Buffer Model and Delays (Example)
Revision 15
2- 16
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