M1A3P250-1VQ100I Datasheet, PDF (52/210 Pages) Microsemi Corporation – ProASIC3 Flash Family FPGAs with Optional Soft ARM Support

ProASIC3 Flash Family FPGAs
Table 2-58 • Minimum and Maximum DC Input and Output Levels
Applicable to Standard I/O Banks
2.5 V LVCMOS
VIL
VIH
VOL VOH IOL IOH
IOSL
IOSH IIL¹ IIH²
Min. Max., Min.
Drive Strength V
V
V
Max.
V
Max.
V
Min.
V mA mA
Max.
mA³
Max.
mA³
µA⁴ µA⁴
2 mA
–0.3 0.7
1.7
3.6
0.7
1.7 2 2
16
18
10 10
4 mA
–0.3 0.7
1.7
3.6
0.7
1.7 4 4
16
18
10 10
6 mA
–0.3 0.7
1.7
3.6
0.7
1.7 6 6
32
37
10 10
8 mA
–0.3 0.7
1.7
3.6
0.7
1.7 8 8
32
37
10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
Test Point
Datapath
35 pF
R = 1 kΩ
Test Point
Enable Path
R to VCCI for t_LZ / t_ZL / t_ZLS
R to GND for t_HZ / t_ZH / t_ZHS
35 pF for t_ZH / t_ZHS / t_ZL / t_ZLS
35 pF for t_HZ / t_LZ
Figure 2-7 • AC Loading
Table 2-59 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
0
Input High (V)
2.5
Measuring Point* (V)
1.2
C_LOAD (pF)
35
Note: *Measuring point = Vtrip. See Table 2-22 on page 2-21 for a complete table of trip points.
Revision 15
2- 47