DDP3310B Datasheet, PDF (52/60 Pages) Micronas – Display and Deflection Processor

DDP 3310B
ADVANCE INFORMATION
4.6.4.16. Analog RGB and Fast-Blank Inputs
Symbol
V_RGBIN
V_RGBIN
V_RGBIN
C_RGBIN
C_IN
I_IL
Parameter
External RGB Input
Voltage Range
Nominal RGB Input Voltage
Peak-to-Peak
RGB Input Voltage for
Maximum Output Current
External RGB Input
Coupling Capacitor
Clamp Pulse Width
Input Capacitance
Input Leakage Current
Pin Name Min.
RIN1
−0.3
GIN1
BIN1
RIN2
0.5
GIN2
BIN2
−
−
−
−
1.6
−
−0.5
V_CLIP
RGB Input Voltage for
−
Clipping Current
V_CLAMP
Clamp Level at Input
40
V_INOFF
Offset Level at Input
−10
V_INOFF
Offset Level Match at Input
−10
R_CLAMP
V_FBLOFF
V_FBLON
V_FBLTRIG
Clamping-ON-Resistance
FBLIN Low Level
FBLIN High Level
Fast-Blanking Trigger
Level typical
−
FBLIN1
−
FBLIN2
0.9
−
t_PID
Delay Fast Blanking to
−
RGB_OUT from midst of
FBLIN-transition
to 90% of RGB_OUT- transition
Difference of Internal Delay
−5
to External RGBin Delay
Switch-Over-Glitch
−
Typ.
−
0.7
0.44
0.7
1.1
10
−
−
−
2
60
−
−
140
−
−
0.7
8
−
0.5
Max.
1.1
Unit Test Conditions
V
1.0
V_PP SCART Spec:
0.7 V ±3 dB
−
Contrast setting: 511
−
Contrast setting: 323
−
Contrast setting: 204
−
nF
−
µs
13
pF
0.5
µA Clamping OFF,
V_IN = −0.3...3 V
−
V
80
mV Clamping ON
10
mV Extrapolated from
V_IN = 100 and 200 mV
10
mV Extrapolated from
V_IN = 100 and 200 mV
−
Ω
0.5
V
−
V
−
15
ns
Internal RGB = 3.75 mA
(Full Scale)
Internal Brightness = 0
External Brightness =
1.5 mA (Full Scale)
RGBin = 0
V_FBLOFF = 0.4 V
V_FBLON = 1.0 V
Rise and fall time = 2 ns
+5
ns
−
pAs Switch from 3.75 mA
(int.) to 1.5 mA (ext.)
52
Micronas