PIC16F1946 Datasheet, PDF (97/440 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC16F/LF1946/47
7.5.7 PIR2 REGISTER
The PIR2 register contains the interrupt flag bits, as
shown in Register 7-7.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User software should ensure the
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
REGISTER 7-7: PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0 R/W-0/0
R/W-0/0
U-0
OSFIF
C2IF
C1IF
EEIF
BCLIF
LCDIF
—
bit 7
R/W-0/0
CCP2IF
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
OSFIF: Oscillator Fail Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 6
C2IF: Comparator C2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 5
C1IF: Comparator C1 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 4
EEIF: EEPROM Write Completion Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 3
BCLIF: MSSP1 Bus Collision Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 2
LCDIF: LCD Module Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 1
Unimplemented: Read as ‘0’
bit 0
CCP2IF: CCP2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
 2010 Microchip Technology Inc.
Preliminary
DS41414A-page 95