PIC16F1946 Datasheet, PDF (295/440 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC16F/LF1946/47
FIGURE 24-4:
Write to TXxREG
BRG Output
(Shift Clock)
TXx/CKx pin
TXxIF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
ASYNCHRONOUS TRANSMISSION (BACK-TO-BACK)
Word 1
Word 2
1 TCY
Start bit
Word 1
Transmit Shift Reg
bit 0
1 TCY
bit 1
Word 1
bit 7/8 _{Stop bit}
Start bit
bit 0
Word 2
Word 2
Transmit Shift Reg
Note:
This timing diagram shows two consecutive transmissions.
TABLE 24-1: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on page
BAUD1CON ABDOVF RCIDL
—
SCKP BRG16
—
WUE ABDEN
BAUD2CON ABDOVF RCIDL
—
SCKP BRG16
—
WUE ABDEN
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE TMR0IF INTF
IOCIF
PIE1
—
ADIE
RC1IE
TX1IE SSP1IE CCP1IE TMR2IE TMR1IE
PIE4
—
—
RC2IE
TX2IE
—
—
BCL2IE SSP2IE
PIR1
—
ADIF
RC1IF
TX1IF SSP1IF CCP1IF TMR2IF TMR1IF
PIR4
—
—
RC2IF
TX2IF
—
—
BCL2IF SSP2IF
RC1STA
SPEN
RX9
SREN
CREN ADDEN FERR
OERR
RX9D
RC2STA
SPEN
RX9
SREN
CREN ADDEN FERR
OERR
RX9D
SP1BRGL
EUSART1 Baud Rate Generator, Low Byte
SP1BRGH
EUSART1 Baud Rate Generator, High Byte
SP2BRGL
EUSART2 Baud Rate Generator, Low Byte
SP2BRGH
EUSART2 Baud Rate Generator, High Byte
TX1REG
EUSART1 Transmit Register
TX1STA
CSRC
TX9
TXEN
SYNC SENDB BRGH
TRMT
TX9D
TX2REG
EUSART2 Transmit Register
TX2STA
CSRC
TX9
TXEN
SYNC SENDB BRGH
TRMT
TX9D
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for asynchronous transmission.
* Page provides register information.
300
300
89
90
93
94
93
299
299
301*
301*
301*
301*
291*
298
291*
298
 2010 Microchip Technology Inc.
Preliminary
DS41414A-page 293