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PIC16F1946 Datasheet, PDF (399/440 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology | |||
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PIC16F/LF1946/47
TABLE 29-2: OSCILLATOR PARAMETERS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C ï£ï TA ï£ï +125°C
Param
No.
Sym.
Characteristic
Freq.
Tolerance
Min.
Typâ
Max. Units
Conditions
OS08 HFOSC Internal Calibrated HFINTOSC
Frequency(2)
ï±2%
ï±2.5
â 16.0 â MHz 0°C ï£ TA ï£ +60°C, VDD ï³ 2.5V
â 16.0 â MHz 60°C ï£ TA ï£ +85°C, VDD ï³ 2.5V
ï±5%
â 16.0 â MHz -40°C ï£ TA ï£ +125°C
OS08A MFOSC Internal Calibrated MFINTOSC
Frequency(2)
ï±2%
ï±2.5%
â 500 â kHz 0°C ï£ TA ï£ +60°C, VDD ï³ 2.5V
â 500 â kHz 60°C ï£ TA ï£ +85°C, VDD ï³ 2.5V
ï±5%
â 500 â kHz -40°C ï£ TA ï£ +125°C
OS10* TIOSC ST HFINTOSC
â
Wake-up from Sleep Start-up Time
MFINTOSC
â
Wake-up from Sleep Start-up Time
â
5
8 ïs
â 20 30 ïs
*
â
Note 1:
2:
3:
These parameters are characterized but not tested.
Data in âTypâ column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are based on
characterization data for that particular oscillator type under standard operating conditions with the device executing
code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current
consumption. All devices are tested to operate at âminâ values with an external clock applied to the OSC1 pin. When an
external clock input is used, the âmaxâ cycle time limit is âDCâ (no clock) for all devices.
To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as
possible. 0.1 ïF and 0.01 ïF values in parallel are recommended.
By design.
TABLE 29-3: PLL CLOCK TIMING SPECIFICATIONS (VDD = 2.7V TO 5.5V)
Param
No.
Sym.
Characteristic
Min.
Typâ
Max. Units Conditions
F10 FOSC Oscillator Frequency Range
F11
FSYS On-Chip VCO System Frequency
F12 TRC PLL Start-up Time (Lock Time)
4
â
8
MHz
16
â
32 MHz
â
â
2
ms
F13*
ïCLK CLKOUT Stability (Jitter)
-0.25%
â
+0.25% %
* These parameters are characterized but not tested.
â Data in âTypâ column is at 5V, 25ï°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
ï£ 2010 Microchip Technology Inc.
Preliminary
DS41414A-page 397
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