PIC16F1946 Datasheet, PDF (41/440 Pages) Microchip Technology – 64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC16F/LF1946/47
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on all
other
Resets
Bank 8
400h⁽²⁾ INDF0
401h⁽²⁾ INDF1
402h⁽²⁾ PCL
403h⁽²⁾ STATUS
404h⁽²⁾ FSR0L
405h⁽²⁾ FSR0H
406h⁽²⁾ FSR1L
407h⁽²⁾ FSR1H
408h⁽²⁾ BSR
409h⁽²⁾ WREG
40Ah^{(1, 2)} PCLATH
40Bh⁽²⁾ INTCON
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
—
—
—
TO
PD
Z
DC
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
Working Register
— Write Buffer for the upper 7 bits of the Program Counter
GIE
PEIE
TMR0IE
INTE
IOCIE TMR0IF INTF
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
C
IOCIF
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
40Ch
ANSELF
ANSELF7 ANSELF6 ANSELF5 ANSELF4 ANSELF3 ANSELF2 ANSELF1 ANSELF0 1111 1111 1111 1111
40Dh
ANSELG
—
—
—
ANSELG4 ANSELG3 ANSELG2 ANSELG1 — ---1 111- ---1 111-
40Eh
—
Unimplemented
—
—
40Fh
—
Unimplemented
—
—
410h
—
Unimplemented
—
—
411h
—
Unimplemented
—
—
412h
—
Unimplemented
—
—
413h
—
Unimplemented
—
—
414h
—
Unimplemented
—
—
415h
TMR4
Timer 4 Module Register
0000 0000 0000 0000
416h
PR4
Timer 4 Period Register
1111 1111 1111 1111
417h
T4CON
—
T4OUTPS<3:0>
TMR4ON
T4CKPS<1:0> -000 0000 -000 0000
418h
—
Unimplemented
—
—
419h
—
Unimplemented
—
—
41Ah
—
Unimplemented
—
—
41Bh
—
Unimplemented
—
—
41Ch
TMR6
Timer 6 Module Register
0000 0000 0000 0000
41Dh
PR6
Timer 6 Period Register
1111 1111 1111 1111
41Eh
T6CON
—
T6OUTPS<3:0>
TMR6ON
T6CKPS<1:0> -000 0000 -000 0000
41Fh
—
Unimplemented
—
—
Legend:
Note 1:
2:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
 2010 Microchip Technology Inc.
Preliminary
DS41414A-page 39